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st7554 v.90 usb world modem controller january 1999 summary data tqfp48 (7 x 7 x 1.40mm) (full plastic quad flat pack) order code : ST7554TQF7 general . usb hot plug & play interface . direct interface to st mafe+daa chip-set st75951/st952 for world- wide daa design or to stlc7550 for traditional daa design . windows a 98 and nt 5.0 support . tapi 2.0 compliant . software upgradable . minimum system requirements: . usb motherboard, 166mhz pentium a processor with mmx ? technology, windows a 98 and 16mbytes ram or windows a nt 5.0 and 32mbytes ram device features . single 9.216mhz crystal oscillator . integrated analog and digital 3.3v regulators . dedicated pins for ring, off-hook, clid, loop current sense . 0.5 m m cmos process . tqfp48 (7 x 7 mm) package data modem / fax / voice . v.90 . v.34bis, v.34, v.32bis, v.32, v.22bis, v.22, v.23, v.21 . bell 103 and bell 212a . v.17, v.27ter, v.29, fax class 1 support . v.42, v.42bis, mnp 2, 3, 4, 5 . v.80 . v.8 and auto mode . voice / fax / modem distinction . adpcm voice compression/decom- pression . voice detection (silence detection) other features . virtual uart (460.8kbps) . at hayes command compatible . time independent escape sequence (ties) command . caller id this is advance information on a new product now in development or undergoing evaluation. details are subject to change without notice. . dtmf detection and generation . wake up on ring . world-wide programmable silicon daa support for st75951/st952 mafe+daa chip-set universal serial bus . specification 1.0, 12mbps full speed . on-chip usb transceiver with digital pll . communication device class and vendor requests . bus or self powered application (pin-programmable) . onnow power management (d0, d2, d3) . low power consumption (suspend mode d2), whole application below 500 m a description the st7554 is a single chip host signal processing modem/fax/voice controller that supports data rates up to 56kbps. all data pump and protocol functions are executed on the host pcs processor. this product has been developed in cooperation with smart link ltd, who ported "usb-modio", its host based modem and system software into st system and hardware platform. the st7554 directly con- nects to st high performance modem analog front- end (mafe) stlc7550 or to the highly integrated mafe+daa chip-set st75951/st952. the st7554 also features an universal serial bus (usb) inter- face for direct connection to the host pc for maxi- mum flexibility and real plug & play operation. 1/11
1 2 3 4 5 6 7 8 16 15 14 13 9 10 11 17 18 19 20 21 22 26 25 28 27 30 29 31 32 33 37 39 38 41 40 42 43 44 12 23 24 34 35 36 45 46 47 48 d- d+ gndbus vregd vbus vrega agnd psm xtalin xtalout fltpll reset dc trxd daasel reserved dgnd dout din mclk fs hc1 pdown reserved buzen pulse dishs rfc led cd reserved reserved clid ho hsdt ri reserved reserved reserved reserved reserved reserved reserved reserved reserved reserved reserved reserved 7554s-01.eps pin connections st7554 2/11
pin list name pin type description xtalin 9 i crystal input xtalout 10 o crystal output reset 12 i reset function to initialise the device (active low) vbus 5 i positive voltage regulator input, connected to usb vbus gndbus 3 i regulator ground, connected to usb ground (0v) (see note 1) vrega 6 i/o positive regulated analog input/output power supply vregd 4 i/o positive regulated digital input/output power supply psm 8 i power supply mode (bus-powered or self-powered) d+ 2 i/o positive data signal of differential data bus conforming to usb standard specification 1.0 d- 1 i/o negative data signal of differential data bus conforming to usb standard specification 1.0 trxd 35 i/o transmit/receive data led dc 36 i/o dc mask buzen 37 i/o buzzer amplifier enable/mute pulse 38 i/o pulse dialing dishs 39 i/o disconnect external phone rfc 40 i/o refresh led 41 i/o led control cd 42 i/o carrier detect led clid 43 i/o caller id ho 45 i/o hook control hsdt 46 i/o current sense ri 48 i/o ring indicator hc1 27 o modem codec hardware control mode selection pdown 26 o ssi powerdown bit output (active low) mclk 29 o ssi master clock output daasel 34 i select silicon or discrete daa configuration mode fs 28 i ssi frame synchronisation input dout 31 o ssi serial data output din 30 i ssi serial data input fltpll 11 oa pll filter analog output. must be connected to analog ground agnd with 33pf capacitor dgnd 32 i digital ground (0v) (see note 1) agnd 7 i analog ground (0v) (see note 1) reserved 13 to 25-33-44 - not connected reserved 47 - connect to digital ground dgnd note 1 : analog and digital ground pins must be tied together to usb ground gndbus. 7554s-01.tbl st7554 3/11
pin description 1 - power supply (7 pins) 1.1 - regulator input power supply (vbus) this pin must be connected to usb vbus (+5v). it supplies the integrated analog usb transceiver. it is also the positive regulator power supply input (5v) when st7554 is in bus-powered mode (psm = 1) and it is used to internally generate the 3.3v supply for the digital and analog circuitry. 1.2 - regulated analog v dd supply (vrega) this pin is the analog power supply input (psm = 0) or analog 3.3v power supply output (psm = 1). this pin is the positive analog power supply for the external codec and daa. it is recommended to add a 1 m f capacitor between vrega and gnda as close as possible to the ic pins. 1.3 - regulated v dd supply (vregd) this pin is the digital power supply input (psm = 0) or digital 3.3v power supply output (psm = 1). this pin is the positive digital power supply for the external codec and daa. it is recommended to add a 1 m f capacitor between vrega and gnda as close as possible to the ic pins. 1.4 - power supply mode (psm) this pin controls the vregd and vrega power supply mode. when psm = 1, the application is bus-powered. the 3.3v power supply is generated internally from vbus. in this case vregd and vrega are out- puts which can be used to supply 3.3v to external devices (see figure 1). when psm = 0, the application is self-powered. vbus must be still connected to the vbus pin of the usb connector in order to supply the integrated usb transceiver. anyway in this case vregd and vrega must be fed by a 3.3v externally regulated digital and analog power supplies (see figure 2). 1.5 - ground (dgnd, agnd and gndbus) dgnd, agnd and gndbus are the digital, analog and usb ground return pins respectively. they should be connected together outside the chip to the gnd pin of the usb plug. 8 psm 5 vbus 3 gndbus 4 vregd 32 dgnd 6 vrega 7 agnd st7554 from usb to other digital ics to other analog ics 7554s-02.eps figure 1 : st7554 in bus-powered mode (psm = 1) 8 psm 5 vbus 3 gndbus 4 vregd 32 dgnd 6 vrega 7 agnd st7554 from usb from 3.3v externally regulated supplies 7554s-03.eps figure 2 : st7554 in self powered mode (psm = 0) 2 - usb interface (d+ , d-) these pins are the positive and negative usb differential data lines. they shall be both connected to the usb plug or usb protection circuit via 27 w series resistors for line impedance matching. st7554 4/11
3 - reset, powerdown ( reset, pdown) reset pin initialises the internal counters and control registers to their default value. a minimum low pulse of 1ms is required to reset the chip. in a typical application reset is connected to vbus through a r, c network. this ensures that the chip is reset at each connection / disconnection to the usb bus (see figure 3). pdown pin shall be connected to the powerdown inputs of the external codec used on the ssi. when st7554 is in suspend mode, pdown is forced low so that the external codec is in powerdown. pin description (continued) 12 reset r 220k w c 10nf vbus 7554s-04.eps figure 3 : rc network for reset 9 10 r 1.8k w c 18pf c 18pf agnd agnd xtal out xtal in 7554s-05.eps figure 4 : application schematic for the 9.216mhz external crystal 4 - serial synchronous interface st7554 has a serial syncronous interface (ssi) dedicated to the connection of the stlc7550 or st75951, st high performance modem analog front-end (mafe). 4.1 - data (din, dout) digital data word input/output of ssi, to be con- nected to the data word pins of stlc7550 or st75951. 4.2 - master clock (mclk) this pin is the master clock output. 4.3 - frame synchronization (fs) the frame synchronization is used to synchronize data transfer between st7554 and the external codec. 4.4 - hardware control (hc1) hc1 must be connected to the corresponding pin of stlc7550 or st75951, while their hc0 pin shall be tied to the 3.3v vregd digital supply. this pin selects data or control modes for the modem codec. 4.5 - daa selection (daasel) connect to vregd when using silicon daa chipset based on st75951 + st952. connect to dgnd when using stlc7550 with discrete interface. 5 - daa control pins (imp, dc, buzen, pulse, dishs, rfc, led, clid, ho, hsdt, ri) these pins control the world wide software programmable daa through st75951/st952. 6 - crystal (xtalin, xtalout) these pins must be tied to the 9.216mhz external crystal. it is recommended to use a 50ppm fundamental parallel resonator crystal. it is recommended to insert a 1.8k w resistor between xtalout and the crystal to limit its energy to 100 m w for a 20 w resonator (see figure 4). for a smd crystal the load capacitor is typically c load = 12pf and this leads to an ideal value of c = 24pf for the capacitors between the crystal and analog ground (agnd). anyway, in practice these capacitors shall be reduced down to c = 18pf each by considering parasitic capacitors on pcb and package (see figure 4). after a reset or when leaving the suspend state, the 9.216mhz is asserted inside st7554 only 3.5ms later in order to wait for it to be stable. 7 - pll output filter (fltpll) this pin must be connected to the analog ground (agnd) through a 33pf capacitor. 8 - reserved pins (18 pins) these pins must be left not connected except pin 47 which should be connected to the digital ground dgnd. st7554 5/11
electrical specifications unless otherwise stated, electrical characteristics are specified over the operating range. typical values are given for v bus = +5v, v rega = 3.3v, v regd = 3.3v, t amb = 25c. absolute maximum rating (agnd = dgnd = usb gnd = 0v, all voltages with respect to 0v) symbol parameter value unit dv dd digital power supply -0.3, 6.0 v i i input current per pin -10, +10 ma i o output current per pin -20, +20 ma v ia analog input voltage -0.3, av dd + 0.3 v v id digital input voltage -0.3, dv dd + 0.3 v t oper operating temperature 0, +70 c t stg storage temperature -55, +150 c p tot maximum power dissipation 200 mw warning : operation beyond these limits may result in permanent damage to the device. normal operation is not guaranted at thes e extremes. nominal dc characteristics (t amb = 0 to 70c unless otherwise specified) symbol parameter min. typ. max. unit power supply and common mode voltage v bus supply voltage 4 5 5.25 v i vbus supply current tbd ma i vbuss supply current in suspend mode (psm = 1) tbd m a v rega analog regulated output power supply (psm =1) analog regulated input power supply (psm =0) 3.4-10% 3.3-10% 3.4 3.3 3.4+10% 3.3+10% v v v regd digital regulated output power supply (psm =1) digital regulated input power supply (psm =0) 3.4-10% 3.3-10% 3.4 3.3 3.4+10% 3.3+10% v v i vrega analog regulated output current (psm =1) analog regulated input current (psm =0) tbd 40 ma ma i vregd digital regulated output current (psm =1) digital regulated input current (psm =0) 20 20 ma ma p dlp low power mode (suspend mode d2, wake-up on ring enabled) tbd mw p d operating power (ssi in power-down) tbd mw p d operating power (d0 power state) tbd mw digital interface (except xtalin, xtalout, psm and reset) (these inputs have hysteresis) v ih v il high level input voltage low level input voltage 0.8 x v regd 0.2 x v regd v v v oh v ol high level output voltage low level output voltage 0.85 x v regd 0.4 v v i leak input leakage current 1 m a i ol i oh high level output current (0 < v ol < v olmax. ) low level output current (v ohmin. < v oh < v regd )-2 2ma ma v hyst schmitt trigger hysteresis 0.8 v c in input capacitance 3 pf psm, reset (these inputs have hysteresis) v ih v il high level input voltage low level input voltage 0.7 x v bus 0.3 x v bus v v i leak input leakage current 1 m a v hyst schmitt trigger hysteresis 1 1.3 v crystal oscillator (xtalin, xtalout) v ih v il high level input voltage low level input voltage 0.8 x v rega 0.2 x v rega v v i ih i il high level input current low level input current -20 20 m a m a st7554 6/11
universal serial bus interface (see chapter 7 of usb rev 1.0 for complete electrical specification) nominal dc characteristics (d+, d-) symbol parameter min. typ. max. unit v di differential input sensitivity [(d+) - (d-)] 0.2 v v cm differential common mode range 0.8 2.5 v v se single ended receiver threshold 0.8 2 v v oh v ol high level output static voltage (rl of 15k w to gnd) low level output static voltage (rl of 1.5k w to 3.6v) 2.8 3.6 0.3 v v i lo hi-z state data line leakage current (0v < v in < 3.3v) 10 m a c in transceiver capacitance (pin to gnd) 20 pf r d (2) driver output resistance (steady state drive) tbd tbd w note 2 : excludes external resistor. in order to comply with usb specifications 1.0, external series resistors of 27 w 1% each on d+ and d- are recommended ac characteristics (d+, d-) (see figure 5 for test scheme) symbol parameter min. typ. max. unit t dr average bit rate (12 m/s 0.05%) 11.97 12.03 mbps t r rise time between 10% and 90% (see figure 6) 4 20 ns t f fall time 10% and 90% (see figure 6) 4 20 ns v crs output signal crossover voltage 1.3 2 v 1 2 15k w 50pf 15k w 50pf test 1.5k w v regd 27 w test d+ d- 27 w 7554s-06.eps figure 5 : test scheme for d+/d- t r t f 90% 10% 90% 10% 7554s-07.eps figure 6 : rise and fall time measures st7554 7/11
st75951 st952 st7554 pots usb 7554s-08.eps figure 7 : st7554 typical application diagram with st75951/st952 typical applications stlc7550 daa st7554 pots usb 7554s-09.eps figure 8 : st7554 typical application diagram with stlc7550 st7554 8/11
23 c3 r2 q1 b1 r4 c5 8 lini lim1 24 gain r5 t1 r0 r1 line plug q2 r3 c4 11 ohc 10 com q3 17 ter1 9 idc 16 ter2 q4 3 rin r9 q5 20 line 22 idi r10 c9 r11 d1 d2 r12 r7 r6 21 idg 19 vdr 15 vdref 14 i ref 18 set 25 lcom 32 lcom 6 toff c6 c7 r8 c8 ic3 st952 26 27 aout ain d5 d6 30 31 d1 d2 d3 d4 1 2 4 5 35 34 d1 d2 31 30 d3 d4 27 26 d5 d6 u1 u2 u3 c10 ic2 st75951 28 23 agnd1 38 agnd2 22 v refn 32 v cms 39 v cm 29 v cmp g1 21 v refp 40 av dd 6 dgnd 5 dv dd 41 45 auxin tstd1 33 tsta2 tsta1 15 18 19 20 ring gpio2 gpio1 47 46 din dout gpio0 17 gpio3 2 sclk 7 xtalout 14 m/s 43 reset 10 hc0 42 hm 8 xtalin 3 fs 11 pwrdwn 9 hc1 16 gpi 4 44 mcm ts c24 c25 dv dd agnd c22 c16 c17 c23 c18 c19 c20 c21 g2 l1 l2 r15 dv dd c13 29 mclk 28 fs 26 pdown 27 hc1 34 daasel 17 31 30 43 45 48 dout din clid ho ri c12 9 xtalin 10 xtalout k1 r16 c11 41 led led 7 agnd 10 fltpll 32 3 2 1 5 8 4 12 6 reset v rega v regd psm dgnd gndbus d+ d- vbus 3 2 1 4 5 6 7 8 usb6 u5 1 2 3 4 usb plug u4 r19 r20 c29 l3 l4 gnd r18 r17 dv dd c15 c30 c31 d4 c14 av dd c26 c27 st7554 ic1 c28 18 47 reserved reserved reserved note : this is an example schematic. details may change without notice. refer to st usb dongle modem documentation. r14 r19 7554s-10.eps figure 9 : st7554 schematic diagram with st75951/st952 typical applications (continued) st7554 9/11
typical applications (continued) note : this is an example schematic. details may change without notice. refer to st usb dongle modem documentation. ic2 stlc7550 21 agnd1 33 agnd2 20 v refn 27 32 v cm 19 v refp 31 av dd 6 dgnd 5 dv dd 3 sclk 8 xtalout 9 xtalin 4 fs 17 pwrdwn 15 hc1 7 42 mcm ts c19 c18 dv dd agnd c9 c17 c15 c8 c16 c14 c11 c10 29 mclk 28 fs 26 pdown 27 hc1 34 daasel 17 31 30 dout din c21 9 xtalin 10 xtalout k1 r9 c22 41 led d1 7 agnd 10 fltpll 32 3 2 1 5 8 4 12 6 reset v rega v regd psm dgnd gndbus d+ d- vbus 3 2 1 4 5 6 7 8 usb6 u1 1 2 3 4 usb plug u4 r6 r7 c12 l2 l3 gnd r2 r3 dv dd c7 c23 c25 c24 av dd c6 c5 st7554 ic1 c13 18 47 reserved reserved reserved r10 48 45 ri ho r8 43 tstd1 44 45 din dout 18 16 r5 41 m/s hc0 reset c20 dv dd 28 auxin- auxin+ l4 l1 c2 c3 g1 g2 40 30 39 29 in+ out+ out- in- 9 10 8 u3 r26 r4 c4 agnd r33 u3 3 2 1 r29 c37 c38 r31 u3 6 5 7 v cm c39 r17 r13 c35 r15 c30 12 13 14 u3 r1 r21 r23 r28 r16 c1 agnd c32 q1 q2 r25 r30 r22 d3 c36 b1 c31 t1 c28 t2 line plug l5 l6 r20 r12 6 5 8 d5 r14 c27 d2 d4 7 3 4 1 2 dv dd r32 r11 r19 r27 r18 r24 7554s-11.eps figure 10 : st7554 schematic diagram with stlc7550 (in tqfp48 package) st7554 10/11
48 37 d3 e 13 24 1 12 25 36 c a1 a2 a d1 d e3 e1 e l k l1 0,25 mm .010 inch gage plane 0,10 mm .004 inch seating plane b pm-5b.eps package mechanical data 48 pins - thin plastic quad flat pack (tqfp) dimensions millimeters inches min. typ. max. min. typ. max. a 1.60 0.063 a1 0.05 0.15 0.002 0.006 a2 1.35 1.40 1.45 0.053 0.055 0.057 b 0.17 0.22 0.27 0.007 0.009 0.011 c 0.09 0.20 0.004 0.008 d 9.00 0.354 d1 7.00 0.276 d3 5.50 0.216 e 0.50 0.0197 e 9.00 0.354 e1 7.00 0.276 e3 5.50 0.216 l 0.45 0.60 0.75 0.018 0.024 0.030 l1 1.00 0.039 k0 o (min.), 7 o (max.) 5b.tbl information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no licence is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or s ystems without express written approval of stmicroelectronics. the st logo is a registered trademark of stmicroelectronics ? 1999 stmicroelectronics - all rights reserved purchase of i 2 c components of stmicroelectronics, conveys a license under the philips i 2 c patent. rights to use these components in a i 2 c system, is granted provided that the system conforms to the i 2 c standard specifications as defined by philips. stmicroelectronics group of companies australia - brazil - canada - china - france - germany - italy - japan - korea - malaysia - malta - mexico - morocco - the neth erlands singapore - spain - sweden - switzerland - taiwan - thailand - united kingdom - u.s.a. http://www.st.com st7554 11/11

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